Module Information
ObjectivesTargeted AudiencePrerequisitesContent SummaryConditionsDurationCertificate
Acquire fundamental skills for verification engineering:
- Be able to leverage the verification job as part of the overall microelectronics development process
- Be able to automate tasks using scripting and makefiles
- Be able to work on verification projects at IP or SoC level using On-Chip-Interconnects and/or AMBA bus protocols
- Apply a systematic and productive debug approach
Engineers Starting in Verification
Engineers willing to gain in productivity in their overall verification tasks
- General hardware design and architecture knowledge
- Some notions on test and verification
- General project management know-how
Common courses for all Verification School (VS) modules:
- Introduction to Verification
- Debug Methodology to gain in productivity
- Verifier’s guide to On-Chip Buses, Interconnects and External I/Os
- Makefile and Scripting with TCL
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- Course openned within 1 to 3 months prior to start
- Subject to validation of the prerequisites and objectives survey
- Learners should have legal and valid accesses to one of the following simulators from their employers:
- SIEMENS Questa
- CADENCE Xcelium
- SYNOPSYS VCS
- English Level B2 minimum
Online Content Time | 14h |
Est. Indep. Learning Time | 14h |
Workshop time | 14h |
Live Integratin Time | 4.5h |
Est. Prep. Time | 60min |
Checkpoint Time | 0min |
A certificate of success will be delivered after completion of 60% of the labs and a score of 60% on the final checkpoint
Training Module Content
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Section Content
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VTB_LI00_LIVE: Kick Off Live Integration ( 45 minutes )
Live Session (Required)
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DBG_LI01_LIVE: Live Integration on Debug ( 1 h )
Live Session (Required)
DBG_1000_WS: Debug Workshop (3h30 live sessions)
Live Session (Required)
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SCR_8000_TUT: Tutor Follow Up on Scripting & Makefiles
In-Person (Required)
CMN_LI04_SLD: Live Integration on Makefile and Scripting ( 5 min + 1h30 live meeting )
Live Session (Required)
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ICN_8000_TUT: Tutor Follow Up on Protocols and Interconnects *
In-Person (Required)